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ltc2942-1 29421f typical a pplica t ion descrip t ion 1a battery gas gauge with internal sense resistor and temperature/voltage measurement the ltc ? 2942-1 measures battery charge state, battery voltage and chip temperature in handheld pc and portable product applications. its operating range is perfectly suited for single cell li-ion batteries. a precision coulomb counter integrates current through an internal sense resistor between the batterys positive terminal and the load or charger. battery voltage and on-chip temperature are measured with an internal 14-bit no latency ?? adc. the three measured quantities (charge, voltage and temperature) are stored in internal registers accessible via the onboard smbus/i 2 c interface. the ltc2942-1 features programmable high and low thresholds for all three measured quantities. if a pro- grammed threshold is exceeded, the device communicates an alert using either the smbus alert protocol or by setting a fag in the internal status register. l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and no latency ?, thinsot and bat-track are trademarks of linear technology corporation. all other trademarks are the property of their respective owners. fea t ures a pplica t ions n indicates accumulated battery charge and discharge n smbus/i 2 c interface n integrated 50m high side sense resistor n 1a sense current range n high accuracy analog integration n adc measures battery voltage and temperature n integrated temperature sensor n 1% voltage and charge accuracy n confgurable alert output/charge complete input n 2.7v to 5.5v operating range n quiescent current less than 100a n small 6-pin 2mm 3mm dfn package n low power handheld products n cellular phones n mp3 players n cameras n gps total charge error vs sense current + sense + i 2 c/smbus to host sense ? charger ltc2942-1 al/cc sda load 0.1f 29421 ta01a 1-cell li-ion scl gnd |i sense | (ma) 1 ?0.50 charge error (%) 0 ?0.25 ?0.75 0.25 0.50 10 100 1000 29421 ta01b ?1.00 v sense + = 3.6v 1.00 0.75
ltc2942-1 29421f supply voltage (sense + ) ............................. C0.3v to 6v scl, sda, al/cc ......................................... C0.3v to 6v sense current (into sense C ) ....................................2a operating ambient temperature range l tc2942-1c ............................................. 0c to 70c l tc2942-1i .......................................... C40c to 85c storage temperature range ................... C65c to 150c (notes 1, 2) top view sense ? al/cc sda sense + gnd scl dcb package 6-lead (2mm s 3mm) plastic dfn 4 5 7 6 3 2 1 t jmax = 150c, q ja = 160c/w (note 9) exposed pad (pin 7): do not connect o r d er i n f orma t ion p in c on f igura t ion a bsolu t e m aximum r a t ings e lec t rical c harac t eris t ics the l denotes the specifcations which apply over the full operating temperature range, otherwise specifcations are at t a = 25c. (note 2) symbol parameter conditions min typ max units power requirements v sense + supply voltage 2.7 5.5 v i supply supply current (note 3) battery gas gauge on, adc sleep l 70 100 120 a a battery gas gauge on, adc converting voltage l 300 400 a battery gas gauge on, adc converting temperature l 350 450 a shutdown l 2.5 a shutdown, v sense + 4.2v 1 a v uvlo undervoltage lockout threshold v sense + falling l 2.5 2.6 2.7 v coulomb counter i sense C sense current l 1 a r sense internal sense resistance 50 m r pp pin-to-pin resistance from sense + to sense C (note 8) 50 74 100 m q lsb charge lsb (note 4) prescaler m = 128 (default) 0.085 mah tce total charge error (note 5) 0.2a |i sense C | 1a dc 1 % 0.2a |i sense C | 1a dc, 0c to 70c 1.8 % 0.02a |i sense C | 1a dc (note 8) l 2.8 % lead free finish tape and reel (mini) tape and reel part marking* package description temperature range ltc2942cdcb-1#trmpbf ltc2942cdcb-1#trpbf ldyr 6-lead (2mm s 3mm) plastic dfn 0c to 70c ltc2942idcb-1#trmpbf ltc2942idcb-1#trpbf ldyr 6-lead (2mm s 3mm) plastic dfn C40c to 85c trm = 500 pieces. *temperature grades are identifed by a label on the shipping container. consult ltc marketing for parts specifed with wider operating temperature ranges. consult ltc marketing for information on lead based fnish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifcations, go to: http://www.linear.com/tapeandreel/
ltc2942-1 29421f e lec t rical c harac t eris t ics the l denotes the specifcations which apply over the full operating temperature range, otherwise specifcations are at t a = 25c. (note 2) symbol parameter conditions min typ max units voltage measurement adc resolution (no missing codes) (note 8) l 14 bits v fs full-scale voltage l 6 v ?v lsb quantization step of 14-bit voltage adc (note 6) 366.2 v tue v voltage total unadjusted error l 1 1.3 % % gain gain accuracy l 1.3 % v os offset extrapolated from measurements at 5.5v and 2.7v 1 10 lsb inl integral nonlinearity l 1 4 lsb t conv conversion time l 15 ms temperature measurement adc resolution (no missing code) (note 8) 10 bits t fs full-scale temperature (note 10) l 600 k ?t lsb quantization step of 10-bit temperature adc (note 6) 0.586 k tue t temperature total unadjusted error v sense + 2.8v (note 8) l 5 3 k k t conv conversion time l 15 ms digital inputs and digital outputs v ith logic input threshold, al /cc, scl, sda l 0.3 ? v sense + 0.7 ? v sense + v v ol low level output voltage, al/cc, sda i = 3ma l 0.4 v i in input leakage, al /cc, scl, sda v in = v sense + /2 l 1 a c in input capacitance, al/cc, scl, sda (note 8) l 10 pf t pcc minimum charge complete (cc) pulse width 1 s i 2 c timing characteristics f scl(max) maximum scl clock frequency l 400 900 khz t buf(min) bus free time between stop/start l 1.3 s t su,sta(min) minimum repeated start set-up time l 600 ns t hd,sta(min) minimum hold time (repeated) start condition l 600 ns t su,sto(min) minimum set-up time for stop condition l 600 ns t su,dat(min) minimum data setup time input l 100 ns
ltc2942-1 29421f timing diagram t su, dat t su, sto t su, sta t buf t hd, sta t hd, dato, t hd, dati t hd, sta start condition stop condition repeated start condition start condition sda scl 29421 f01 t of figure 1. defnition of timing on i 2 c bus e lec t rical c harac t eris t ics the l denotes the specifcations which apply over the full operating temperature range, otherwise specifcations are at t a = 25c. (note 2) symbol parameter conditions min typ max units t hd,dati(min) minimum data hold time input l 0 s t hd,dato data hold time output l 0.3 0.9 s t of data output fall time (notes 7, 8) l 20 + 0.1 ? c b 300 ns note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: all currents into pins are positive, all voltages are referenced to gnd unless otherwise specifed note 3: i supply = i sense + + i sense C note 4: the equivalent charge of an lsb in the accumulated charge register depends on the setting of the internal prescaling factor m: q lsb = 0.085mah ? m 128 see choosing coulomb counter prescaler m section for more information. 1mah = 3.6c (coulombs). note 5: deviation of q lsb from its nominal value. data is for a new device and does not include long-term sense resistor aging. see the internal sense resistor section for more information. note 6: the quantization step of the 14-bit adc in voltage mode and 10-bit adc in temperature mode is not to be mistaken with the lsb of the combined 16-bit voltage registers (i, j) and 16-bit temperature registers (m, n). note 7: c b = capacitance of one bus line in pf (10pf c b 400pf). see voltage and temperature registers section for more information. note 8: guaranteed by design, not subject to test. note 9: value decreases if exposed pad is soldered to large copper area. see power dissipation section for more information. note 10: use for scaling of temperature reading only. do not use part outside operating temperature range.
ltc2942-1 29421f typical p er f ormance c harac t eris t ics supply current vs supply voltage shutdown supply current vs supply voltage voltage measurement adc total unadjusted error temperature error vs temperature total charge error vs sense current total charge error vs supply voltage total charge error vs temperature |i sense | (ma) 1 ?0.50 charge error (%) 0 ?0.25 ?0.75 0.25 0.50 10 100 1000 29421 g01 ?1.00 1.00 0.75 v sense + = 2.7v v sense + = 4.2v v sense + (v) 2.5 ?1.0 charge error (%) ?0.8 ?0.4 ?0.2 0 1.0 0.4 3.5 4.5 5 29421 g02 ?0.6 0.6 0.8 0.2 3 4 5.5 6 |i sense | = 1a |i sense | = 200ma temperature (c) ?50 charge error (%) ?0.25 0 0.25 25 75 24921 g03 ?0.50 ?0.75 ?1.00 ?25 0 50 0.50 0.75 1.00 100 +50ppm/k optimum ?50ppm/k temperature compensation trim deviation |i sense | = 200ma v sense + (v) 2.5 i supply (a) 80 90 100 4.0 5.0 29421 g04 70 60 3.0 3.5 4.5 5.5 6.0 50 40 t a = 25c t a = ?40c t a = 85c v sense + (v) 2.5 0 i shutdown (a) 1.0 2.0 3.5 4.5 5.0 29421 g05 0.5 1.5 3.0 4.0 5.5 6.0 t a = 25c t a = ?40c t a = 85c voltage measurement adc integral nonlinearity temperature (c) ?50 ?25 ?3 temperature error (c) ?2 ?1 0 1 2 3 0 755025 100 29421 g08 v sense ? (v) 2.5 ?10 total unadjusted error (mv) ?8 ?4 ?2 0 10 4 3.5 4.5 5.0 29421 g06 ?6 6 8 2 3.0 4.0 5.5 6.0 t a = 25c t a = 85c t a = ?45c v sense ? (v) 2.5 inl (v lsb ) 4.0 29421 g07 0 ?1.0 3.0 3.5 4.5 1.0 0.5 ?0.5 5.0 5.5 6.0 t a = ?40c t a = 85c t a = 25c sense resistor stability khours ?3.0 ?r/r o (%) ?2.0 ?1.0 0 ?2.5 ?1.5 ?0.5 10 20 30 40 29421 g09 50 0 accelerated load life test data scaled to t amb = 85c, i sense = 1a conditions
ltc2942-1 29421f p in func t ions b lock diagram sense + (pin 1): positive current sense input and power supply. connect to the load and battery charger output. v sense + operating range is 2.7v to 5.5v. gnd (pin 2): device ground. connect directly to the nega- tive battery terminal. scl (pin 3): serial bus clock input. sda (pin 4): serial bus data input and output. al /cc (pin 5): alert output or charge complete input. confgured either as an smbus alert output or charge complete input by control register bits b[2:1]. at power-up, the pin defaults to alert mode conforming to the smbus alert response protocol. it behaves as an open-drain logic output that pulls to gnd when any threshold register value is exceeded. when confgured as a charge complete input, a high level at cc sets the value of the accumulated charge (registers c, d) to ffffh. columb counting starts when the input returns to low level. sense C (pin 6): negative current sense input. connect sense C to the positive battery terminal. current from/into this pin must not exceed 1a in normal operation. exposed pad (pin 7): do not connect. soldering the exposed pad to adequate electrically isolated copper area is recommended for best thermal performance, and best accuracy of the integrated temperature sensor. ref + ref ? ref clk coulomb counter adc in clk mux sense ? reference generator temperature sensor accumulated charge register data and control registers oscillator 6 sense + 1 al/cc al 5 gnd r sense 50m 2 i 2 c/ smbus scl cc sda 29421 bd 3 4 v supply r bond 12m r bond 12m o pera t ion overview the ltc2942-1 is a battery gas gauge device designed for use with single li-ion cells and other battery types with terminal voltages from 2.7v to 5.5v. it measures battery charge and discharge, battery voltage and chip temperature. a precision coulomb counter integrates current through an internal sense resistor between the batterys positive terminal and the load or charger. battery voltage and on-chip temperature are measured with an internal 14-bit/10-bit adc. the integrated, temperature- compensated sense resistor offers board space savings and superior charge measurement accuracy in applications with currents up to 1a.
ltc2942-1 29421f coulomb counter charge is the time integral of current. the ltc2942-1 mea- sures battery current by monitoring the voltage developed across its internal sense resistor and then integrates this information to infer charge. the internal sense resistor is tied between the sense + and sense C pins and is con- nected to an auto-zeroed differential analog integrator which converts the measured current to charge. when the integrator output reaches the refhi or reflo thresholds, switches s1, s2, s3 and s4 toggle to reverse the ramp direction. by observing the condition of the switches and the ramp direction, polarity is determined. a programmable prescaler effectively increases integration time by a factor m programmable from 1 to 128. at each underfow or overfow of the prescaler, the accumulated charge register (acr) value is incremented or decremented one count. the value of accumulated charge is read via the i 2 c interface. voltage and temperature adc the ltc2942-1 includes a 14-bit no latency ? analog- to-digital converter, with internal clock and voltage refer- ence circuits. + load charger r sense battery i bat ? + ? + ? + s4 r bond r bond refhi reflo s3 s2 s1 v cc sense + 1 sense ? 6 gnd 2 polarity detection control logic m prescaler acr 29421 f02 figure 2. coulomb counter section of the ltc2942-1 the adc can either be used to monitor the battery voltage at sense C or to convert the output of the on-chip tempera- ture sensor. the sensor generates a voltage proportional to temperature with a slope of 2.5mv/k resulting in a voltage of 750mv at 27c. conversion of either temperature or voltage is triggered by setting the control register via the i 2 c interface. the ltc2942-1 features an automatic mode where a voltage and a temperature conversion are executed every two seconds. at the end of each conversion the corresponding registers are updated and the converter goes to sleep to minimize quiescent current. power-up sequence when v sense + rises above a threshold of approximately 2.5v, the ltc2942-1 generates an internal power-on reset (por) signal and sets all registers to their default state. in the default state, the coulomb counter is active while the voltage and temperature adc is switched off. the accumulated charge register is set to mid-scale (7fffh), all low threshold registers are set to 0000h and all high threshold registers are set to ffffh. the alert mode is enabled and the coulomb counter pre-scaling factor m is set to 128. o pera t ion
ltc2942-1 29421f a pplica t ions i n f orma t ion i 2 c/smbus interface the ltc2942-1 communicates with a bus master using a 2-wire interface compatible with i 2 c and smbus. the 7-bit hard-coded i 2 c address of the ltc2942-1 is 1100100 . the ltc2942-1 is a slave-only device. therefore the serial clock line (scl) is an input only while the serial data line (sda) is bidirectional. the device supports i 2 c standard and fast mode. for more details refer to the i 2 c protocol section. internal registers the ltc2942-1 integrates current through a sense resistor, measures battery voltage and temperature and stores the results in internal 16-bit registers accessible via i 2 c. high and low limits can be programmed for each measurement quantity. the ltc2942-1 continuously monitors these limits and sets a corresponding fag in its status register when a limit is exceeded. if the alert mode is enabled, the al /cc pin pulls low. the sixteen internal registers are organized as shown in table 1. table 1. register map address name register description r/w default 00h a status r see below 01h b control r/w 3ch 02h c accumulated charge msb r/w 7fh 03h d accumulated charge lsb r/w ffh 04h e charge threshold high msb r/w ffh 05h f charge threshold high lsb r/w ffh 06h g charge threshold low msb r/w 00h 07h h charge threshold low lsb r/w 00h 08h i voltage msb r xxh 09h j voltage lsb r xxh 0ah k voltage threshold high r/w ffh 0bh l voltage threshold low r/w 00h 0ch m temperature msb r xxh 0dh n temperature lsb r xxh 0eh o temperature threshold high r/w ffh 0fh p temperature threshold low r/w 00h r = read, w = write, xx = unknown status register (a) the status of the charge, voltage and temperature alerts is reported in the status register shown in table 2. table 2. status register a (read only) bit name operation default a[7] chip identifcation 0: ltc2942-1 1: ltc2941-1 0 a[6] reserved not used. 0 a[5] accumulated charge overfow/underfow indicates that the value of the accumulated charge hit either top or bottom. 0 a[4] temperature alert indicates one of the temperature limits was exceeded. 0 a[3] charge alert high indicates that the accumulated charge value exceeded the charge threshold high limit. 0 a[2] charge alert low indicates that the accumulated charge value dropped below the charge threshold low limit. 0 a[1] voltage alert indicates one of the battery voltage limits was exceeded. 0 a[0] undervoltage lockout alert indicates recovery from undervoltage. if set to 1, a uvlo has occurred and the content of the registers is uncertain. x all status register bits except a[7] are cleared after being read by the host, if the conditions which set these bits have been removed. as soon as one of the three measured quantities exceeds the programmed limits, the corresponding bit a[4], a[3], a[2] or a[1] in the status register is set. bit a[5] is set if the ltc2942-1s accumulated charge registers (acr) overfows or underfows. in these cases, the acr stays at ffffh or 0000h and does not roll over. the undervoltage lockout (uvlo) bit of the status register a[0] is set if, during operation, the voltage on sense + pin drops below 2.7v without reaching the por level. the analog parts of the coulomb counter are switched off while the digital register values are retained. after recov- ery of the supply voltage the coulomb counter resumes integrating with the stored value in the accumulated charge registers but it has missed any charge fowing while sense + < 2.7v.
ltc2942-1 29421f a pplica t ions i n f orma t ion the hard-coded bit a[7] of the status register enables the host to distinguish the ltc2942-1 from the pin compat- ible ltc2941, allowing the same software to be used with both devices. control register (b) the operation of the ltc2942-1 is controlled by program- ming the control register. table 3 shows the organization of the 8-bit control register b[7:0]. table 3. control register b bit name operation default b[7:6] adc mode [11] automatic mode. performs voltage and temperature conversion every second. [10] manual voltage mode. performs single voltage conversion, then sleeps. [01] manual temperature mode. performs single temperature conversion, then sleeps. [00] sleep. [00] b[5:3] prescaler m sets coulomb counter prescaling factor m between 1 and 128. default is 128. m = 2 (4 ? b[5] + 2 ? b[4] + b[3]) [111] b[2:1] al /cc confgure confgures the al/cc pin. [10] alert mode. alert functionality enabled. pin becomes logic output. [01] charge complete mode. pin becomes logic input and accepts charge complete signal (e.g., from a charger) to set accumulated charge register (c,d) to ffffh. [00] al/cc pin disabled. [11] not allowed. [10] b[0] shutdown shut down analog section to reduce i supply . [0] power down b[0] programming the last bit b[0] of the control register to 1 sets the analog parts of the ltc2942-1 in power down and the current consumption drops typically below 1a. all analog circuits are disabled while the values in the registers are retained. note that any charge fowing while b[0] is 1 is not measured and the charge information below 1lsb of the accumulated charge register is lost. alert/charge complete confguration b[2:1] the al /cc pin is a dual function pin confgured by the control register. by setting bits b[2:1] to [10] (default) the al /cc pin is confgured as an alert pin following the smbus protocol. in this confguration the al /cc pin is a digital output and is pulled low if one of the three mea- sured quantities (charge, voltage, temperature) exceeds its high or low threshold or if the value of the accumulated charge register overfows or underfows. an alert response procedure started by the master resets the alert at the al /cc pin. for further information see the alert response protocol section. setting the control bits b[2:1] to [01] confgures the al/cc pin as a digital input. in this mode, a high input on the al /cc pin communicates to the ltc2942-1 that the bat- tery is full and the accumulated charge register is set to its maximum value ffffh. columb counting starts when the al/cc pin returns to low level. if neither the alert nor the charge complete functionality is desired, bits b[2:1] should be set to [00]. the al/cc pin is then disabled and should be tied to gnd. avoid setting b[2:1] to [11] as it enables the alert and the charge complete modes simultaneously. choosing coulomb counter prescaler m b[5:3] to use as much of the range of the accumulated charge register as possible the prescaler factor m is chosen based on battery capacity q bat : m q mah ah q bat bat = 128 2 0 085 23 16 ? ? . ? m can be set to 1, 2, 4, 8,... 128 by programming b[5:3] of the control register as m = 2 (4 ? b[5] + 2 ? b[4] + b[3]) . the default value after power up is m = 128 = 2 7 (b[5:3] = 111). the maximum battery capacity supported within the prescaler range is 5.5ah with m = 128. see the section extending coulomb counter range if battery capacity is higher. depending on the choice of prescaler factor m, the charge lsb of the accumulated charge register becomes: q mah m lsb = 0 085 128 . ?
ltc2942-1 0 29421f a pplica t ions i n f orma t ion note that the internal digital resolution of the coulomb counter is higher than indicated by qlsb. the internal charge resolution is typically 299as. adc mode b[7:6] the ltc2942-1 features an adc which measures either voltage on sense C (battery voltage) or temperature via an internal temperature sensor. the reference voltage and clock for the adc are generated internally. the adc has four different modes of operation as shown in table 3. these modes are controlled by bits b[7:6] of the control register. at power-up, bits b[7:6] are set to [00] and the adc is in sleep mode. a single voltage conversion is initiated by setting the bits b[7:6] to [10]. a single temperature conversion is started by setting bits b[7:6] to [01]. after a single voltage or temperature conversion, the adc resets b[7:6] to [00] and goes to sleep. the ltc2942-1 also offers an automatic scan mode where the adc converts voltage, then temperature, then sleeps for approximately two seconds before repeating the voltage and temperature conversions. the ltc2942-1 is set to this automatic mode by setting b[7:6] to [11] and stays in this mode until b[7:6] are reprogrammed by the host. programming b[7:6] to [00] puts the adc to sleep. if control bits b[7:6] change within a conversion, the adc will complete the current conversion before entering the newly selected mode. a conversion of either voltage or temperature requires 10ms conversion time (typical). at the end of each conversion, the corresponding registers are updated. if the converted quantity exceeds the values programmed in the threshold registers, a fag is set in the status register and the al/cc pin is pulled low (if alert mode is enabled). accumulated charge register (c,d) the coulomb counter of the ltc2942-1 integrates current through its internal sense resistor over time. the result of this charge integration is stored in the 16-bit accumulated charge register (registers c, d). the amount of charge for a given register contents (c[7:0]d[7:0]) and prescaler setting m can be calculated by: q mah m c d = + ( ) 0 085 128 256 . ? ? ? the acr should be read in a single i 2 c read transaction (see figure 10). if c and d are read in individual single- byte transactions, each with a stop condition, the register may change between the frst and the second transaction due to coulomb count events, causing erroneous charge readings. as the ltc2942-1 does not know the actual battery status at power-up, the accumulated charge register (acr) is set to mid-scale (7fffh). if the host knows the status of the battery, the accumulated charge (c[7:0]d[7:0]) can be either programmed to the correct value via i 2 c or it can be set after charging to ffffh (full) by pulling the al /cc pin high if charge complete mode is enabled via bits b[2:1]. in this case, ffffh represents a fully charged battery. if the actual battery capacity is smaller, the host can subtract the excess charge whenever doing the charge calculation, and set the low charge threshold (registers g,h) to the value representing an empty battery. this procedure essentially shifts the zero point of the scale upwards. before writing the accumulated charge registers, the analog section should be shut down by setting b[0] to 1. voltage and temperature registers (i, j),(m, n) the result of the 14-bit adc conversion of the voltage at sense C is stored in the voltage registers (i, j), whereas the temperature measurement result is stored in the tem- perature registers (m, n). the voltage and temperature registers are read only. as the adc resolution is 14-bit in voltage mode and 10-bit in temperature mode, the lowest two bits of the combined voltage registers (i, j) and the lowest six bits of the combined temperature registers (m, n) are always zero. from the result of the 16-bit voltage registers i[7:0]j[7:0] the measured voltage can be calculated as: v v result ffff v result sense h h dec ? ? ? = = 6 6 65535
ltc2942-1 29421f a pplica t ions i n f orma t ion example: a register value of i[7:0] = b0 h and j[7:0] = 1c h corresponds to a voltage on sense C of: v v b c ffff v v sense h h dec ? ? ? . = = 6 01 6 45084 65535 4 1276 voltage is measured at the internal bond pads connected to sense C , hence, the current fowing through the combined pin and bond wire resistance causes the measured voltage to deviate slightly from the actual battery voltage at the sense C package pin. for the full-scale current of 1a at room temperature, this error is typically 9mv, which is negligible in most applications. to increase the precision of the voltage measurement, the error can be reduced by differentiating the coulomb counter data, multiplying the resultant current value by 9 m?, and adding or subtract- ing the result from the voltage measurement. note that the sign of the error changes depending on the direction of the current fow. the actual temperature can be obtained from the two byte register c[7:0]d[7:0] by: t k result ffff k result h h dec = = 600 600 65535 ? ? example: a register value of c[7:0] = 80 h d[7:0] = 00 h corresponds to 300k or 27c. temperature is measured on the surface of the chip (t die ), which may be different from ambient temperature t amb , especially with high sense resistor currents. to minimize errors in the temperature measurement, the dfn packages exposed pad may be thermally coupled to the body whose temperature is to be measured. with the recommended pcb layout (figure 11), t die typically increases over t amb by 1k for 0.25a, 3k for 0.5a and 12k for 1a. different results may be obtained depending on layout, mounting details, and air fow. software in the host system can reduce this error if the rise over t amb is known by differentiating the coulomb counter data to obtain current and using this value to correct the temperature reading. threshold registers (e, f, g, h, k, l, o, p) for each of the measured quantities (battery charge, volt- age and temperature) the ltc2942-1 features a high and a low threshold registers. at power-up, the high thresholds are set to ffffh while the low thresholds are set to 0000h. all thresholds can be programmed to a desired value via i 2 c. as soon as a measured quantity exceeds the high threshold or falls below the low threshold, the ltc2942 -1 sets the corresponding fag in the status register and pulls the al /cc pin low if alert mode is enabled via bits b[2:1]. note that the voltage and temperature threshold registers are single byte registers and only the 8 msbs of the corresponding quantity are checked. to set a low level threshold for the battery voltage of 3v, register l should be programmed to 80h; a high temperature limit of 60c is programmed by setting register o to 8eh. i 2 c protocol the ltc2942-1 uses an i 2 c/smbus compatible 2-wire open-drain interface supporting multiple devices and masters on a single bus. the connected devices can only pull the bus wires low and they never drive the bus high. the bus wires must be externally connected to a positive supply voltage via a current source or pull-up resistor. when the bus is idle, both sda and scl are high. data on the i 2 c bus can be transferred at rates of up to 100kbit/s in standard mode and up to 400kbit/s in fast mode. each device on the i 2 c/smbus is recognized by a unique address stored in that device and can operate as either a transmitter or receiver, depending on the function of the device. in addition to transmitters and receivers, devices can also be classifed as masters or slaves when perform- ing data transfers. a master is the device which initiates a data transfer on the bus and generates the clock signals to permit that transfer. at the same time any device ad- dressed is considered a slave. the ltc2942-1 always acts as a slave. figure 3 shows an overview of the data transmission for fast and standard mode on the i 2 c bus. start and stop conditions when the bus is idle, both scl and sda must be high. a bus master signals the beginning of a transmission with a start condition by transitioning sda from high to low while scl is high. when the master has f nished com- municating with the slave, it issues a stop condition by
ltc2942-1 29421f a pplica t ions i n f orma t ion transitioning sda from low to high while scl is high. the bus is then free for another transmission. when the bus is in use, it stays busy if a repeated start (sr) is generated instead of a stop condition. the repeated start (sr) conditions are functionally identical to the start (s). data transmission after a start condition, the i 2 c bus is considered busy and data transfer begins between a master and a slave. as data is transferred over i 2 c in groups of nine bits (eight data bits followed by an acknowledge bit), each group takes nine scl cycles. the transmitter releases the sda line during the acknowledge clock pulse and the receiver issues an acknowledge (ack) by pulling sda low or leaves sda high to indicate a not acknowledge (nak) condition. change of data state can only happen while scl is low. write protocol the master begins a write operation with a start condi- tion followed by the seven bit slave address 1100100 and the r/ w bit set to zero, as shown in figure 4. the ltc2942-1 acknowledges this by pulling sda low and then the master sends a command byte which indicates which internal register the master is to write. the ltc2942 -1 acknowledges and latches the command byte into its internal register address pointer. the master delivers the data byte, the ltc2942-1 acknowledges once more and latches the data into the desired register. the transmission is ended when the master sends a stop condition. if the master continues by sending a second data byte instead of a stop, the ltc2942-1 acknowledges again, increments its address pointer and latches the second data byte in the following register, as shown in figure 5. read protocol the master begins a read operation with a start condition followed by the seven bit slave address 1100100 and the r/w bit set to zero, as shown in figure 6. the ltc2942-1 acknowledges and then the master sends a command byte which indicates which internal register the master is to read. the ltc2942-1 acknowledges and then latches the command byte into its internal register address pointer. the master then sends a repeated start condition followed by the same seven bit address with the r/ w bit now set to one. the ltc2942-1 acknowledges and sends the con- tents of the requested register. the transmission is ended when the master sends a stop condition. if the master acknowledges the transmitted data byte, the ltc2942-1 increments its address pointer and sends the contents of the following register as depicted in figure 7. alert response protocol in a system where several slaves share a common inter- rupt line, the master can use the alert response address (ara) to determine which device initiated the interrupt (figure 8). the master initiates the ara procedure with a start con- dition and the special 7-bit ara bus address (0001100) followed by the read bit (r) = 1. if the ltc2942-1 is as- serting the al /cc pin in alert mode, it acknowledges and responds by sending its 7-bit bus address (1100100) and a 1. while it is sending its address, it monitors the sda pin to see if another device is sending an address at the same time using standard i 2 c bus arbitration. if the ltc2942-1 is sending a 1 and reads a 0 on the sda pin on the rising edge of scl, it assumes another device with a lower ad- dress is sending and the ltc2942-1 immediately aborts its transfer and waits for the next ara cycle to try again. if transfer is successfully completed, the ltc2942-1 will stop pulling down the al /cc pin and will not respond to further ara requests until a new alert event occurs. internal sense resistor the internal sense resistor uses proprietary* tempera- ture compensation techniques to reduce the effective temperature coeffcient to less than 50 ppm/k typically. the effective sense resistance as seen by the coulomb counter is factory trimmed to 50m?. both measures, and the lack of thermocouple effects in the sense resis- tor connections, contribute to the ltc2942-1s superior charge measurement accuracy compared to competing solutions employing a common 1% tolerance, 50ppm/k tempco discrete current sense resistor. like all sense resistors, the integrated sense resistor in the ltc2942-1 will exhibit minor long-term resistance shift. the resistance typically drops less than C0.1% per *patent pending.
ltc2942-1 29421f a pplica t ions i n f orma t ion 1000h at 1a current and 85c ambient temperature; this outperforms most types of discrete sense resistors except those of the very high and ultrahigh stability variety. see the typical performance characteristics for expected resistor drift performance under worst-case conditions. drift will be much slower at lower temperatures. contact ltc applications for more information. for most coulomb counter applications this aging behavior of the integrated sense resistor is insignifcant compared to the change of battery capacity due to battery aging. the ltc2942-1 is factory trimmed to optimum accuracy when new; for applications which require the best possible coulomb count accuracy over the full product lifetime, the coulomb counter gain can be adjusted in software. for instance, if the error contribution of sense resistor drift must be limited to 1%, coulomb counts may be biased high by 1% (use factor 1.01), and maximum operational temperature and current then must be derated such that sense resistor drift over product lifetime or calibration intervals is less than C2%. applications employing the standard external resistor ltc2942 with an external 50m? sense resistor may be upgraded to the pin-compatible ltc2942-1 by removing the external sense resistor. voltage drop between sense + and sense C the ltc2942-1 is trimmed for an effective internal resis- tance of 50m? , but the total pin-to-pin resistance (r pp ), consisting of the sense resistor in series with pin and bond wire resistances, is somewhat higher. assuming a sense resistor temperature coeffcient of about 3900ppm/k, the total resistance between sense + and sense C at a temperature t is typically: r pp (t) = r pp(tnom) [1 + 0.0039(t C t nom )] scl sda start condition stop condition address r/w ack data ack data ack 1 - 7 8 9 29421 f03 a6 - a0 b7 - b0 b7 - b0 1 - 7 8 9 1 - 7 8 9 p s figure 3. data transfer over i 2 c or smbus from master to slave s w address register data from slave to master 29421 f04 a: acknowledge (low) a : not acknowledge (high) s: start condition p: stop condition r: read bit (high) w: write bit (low) a a a 0 1100100 01h fch 0 0 0 p figure 4. writing fch to the ltc2942-1 control register (b) s w address register data 29421 f05 a a a 0 1100100 02h f0h 01h 0 0 0 0 p data a s w address register s 29421 f06 a a address 0 1100100 00h 1 0 0 1100100 0 p r 1 a 01h data a figure 5. writing f001h to the ltc2942-1 accumulated charge register (c, d) figure 6. reading the ltc2942-1 status register (a) s w address register s 29421 f07 a a address 0 1100100 08h 1 0 0 1100100 0 p r 0 a f1h data 24h data a 1 a figure 7. reading the ltc2942-1 voltage register (i, j)
ltc2942-1 29421f a pplica t ions i n f orma t ion where t nom = 27c (or 300k) and r pp (t nom ) is from the electrical characteristics table. this means that the resistance between sense + and sense C may drop by 26% if die temperature changes from 27c to C40c or increase by 23% for a 27c to 85c die temperature change. ensure that total voltage drop between sense + and sense C , caused by maximum peak current fowing in/out of sense C : v drop = i peak ? r pp (t die(max) ) does not exceed the applications requirements. limiting inrush current inrush currents during events like battery insertion or closure of a mechanical power switch may be substan- tially higher than peak currents during normal operation. extremely large inrush currents may require additional circuitry to keep currents through the ltc2942-1 sense resistor below the absolute maximum ratings. note that external schottky clamp diodes between sense + and sense C can leak signifcantly, especially at high tem- perature, which can cause signifcant coulomb counter errors. preferred solutions to limit inrush current include active hot swap? current limiting or connector designs that include current limiting resistance and staggered pins to ensure a low impedance connection when the connector is fully mated. power dissipation power dissipation in the r pp resistance when operated at high currents can increase the die temperature sev- eral degrees over ambient. soldering the exposed pad of the dfn package to a large copper region on the pcb is recommended for applications operating close to the specifed maximum current and ambient temperature. die temperature at a given i sense can be estimated by: t die = t amb + 1.22 ? ja ? r pp(max) ? i sense 2 where the factor 1.22 approximates the effect of sense resistor self-heating, r pp(max) is the maximum pad-to- pad resistance at nominal temperature (27c) and ja is the thermal resistance from junction to ambient. the ja data given for the dfn package is valid for typical pcb layouts; more precise ja data for a particular pcb layout may be obtained by measuring the voltage v p-p between sense + and sense C , the ambient temperature t amb , and the die temperature t die , and calculating: ja die amb p p sense t t v i = ? ? - both t amb and t die temperature may be measured using the internal temperature sensor included in the ltc2942-1. i sense should be set to zero to measure t amb , and high enough during t die measurement to achieve a signifcant temperature increase over t amb . s r alert response address device address 29421 f08 a 1 0001100 11001001 0 1 p a figure 8. ltc2942-1 serial bus sda alert response protocol s 10ms w address register s 29421 f09 a a address 0 1100100 08h 1 0 0 1100100 0 p r 0 a f1h data 80h data a 1 a s w address register data a a 0 1100100 01h bc 0 0 p figure 9. voltage conversion sequence s w address register s 29421 f10 a a address 0 1100100 02h 1 0 0 1100100 0 p r 0 a 80h data 01h data a 1 a figure 10. reading the ltc2942-1 accumulated charge registers (c, d)
ltc2942-1 29421f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. p ackage descrip t ion figure 11. recommended layout dcb package 6-lead plastic dfn (2mm 3mm) (reference ltc dwg # 05-08-1715) 3.00 p0.10 (2 sides) 2.00 p0.10 (2 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (tbd) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 p 0.10 bottom view?exposed pad 1.65 p 0.10 (2 sides) 0.75 p0.05 r = 0.115 typ r = 0.05 typ 1.35 p0.10 (2 sides) 1 3 64 pin 1 bar top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dcb6) dfn 0405 0.25 p 0.05 0.50 bsc pin 1 notch r0.20 or 0.25 s 45o chamfer 0.25 p 0.05 1.35 p0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 p0.05 (2 sides) 2.15 p0.05 0.70 p0.05 3.55 p0.05 package outline 0.50 bsc measuring current in some applications, it may be desirable to measure the current i sense fowing through the internal sense resistor. since charge measured by the coulomb counter is the time integral over i sense , differentiation of the contents of the accumulated charge register (acr) over time may be used to measure average current. accuracy of such an indirect current measurement is limited by the basic accuracy of the coulomb counter, the accuracy of the timebase within the host system, quantization caused by the prescaler setting, and time delays caused by i 2 c transactions. still, especially at higher currents, useful results may be obtained by reading the accumulated charge register twice, with a defned time interval in between, and dividing the charge difference by the time interval. the time interval may be increased at low currents to limit time quantization errors to the desired accuracy. for quicker current measurements at low currents, prescale factor m may be temporarily decreased, sacrifcing some coulomb count accuracy for higher current resolution. extending coulomb counter range to increase the range of the coulomb counter for battery capacities higher than 5.5ah, the host controller can either regularly poll the accumulated charge register (acr) or use the threshold registers to determine when the accumulated charge register approaches the minimum or maximum limits. at this point it can add or subtract a fxed charge quantity and rewrite the result into the acr. the added or subtracted charge quantities can then be tracked in software, increasing the effective acr range. pc board layout suggestions keep all traces as short as possible to minimize noise and inaccuracy. use wider traces from the resistor to the bat- tery, load and/or charger (see figure 11). put the bypass capacitor close to sense + and gnd. provide adequate copper area on exposed pad for heat sinking. ltc2942-1 electrically isolated heat sink connected to exposed pad only 29421 f11 to battery to charger/load 4 5 6 3 2 1 c a pplica t ions i n f orma t ion
ltc2942-1 29421f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2010 lt 0710 ? printed in usa r ela t e d p ar t s typical a pplica t ion single cell lithium-ion coulomb counter with battery charger for discharge currents of up to 1a + sense + sense ? ltc2942-1 al/cc sda 1-cell li-ion 0.1f load scl 2 29421 ta02 6 5 2k 2k 2k 2k 4 3 1 gnd p 3.3v 3 v dd bat 1 2 4 v in 5v 5 shdn v cc prog ltc4057-4.2 (charger) 1f gnd part number description comments battery gas gauges ltc2942 battery gas gauge with i 2 c interface and voltage and temperature adc 2.7v to 5.5v operation, 14-bit ?-adc, pin compatible with ltc2941 ltc2941 battery gas gauge with i 2 c interface 2.7v to 5.5v operation, pin compatible with ltc2942 ltc2941-1 battery gas gauge with i 2 c interface and integrated 50m sense resistor 2.7v to 5.5v operation, pin compatible with ltc2942-1 ltc4150 coulomb counter/battery gas gauge 2.7v to 8.5v operation, 10-pin msop package battery chargers ltc1734 lithium-ion battery charger in thinsot? simple thinsot charger, no blocking diode, no sense resistor needed ltc4002 switch mode lithium-ion battery charger standalone, 4.7v v in 24v, 500khz frequency ltc4052 monolithic lithium-ion battery pulse charger no blocking diode or external power fet required, 1.5a charge current ltc4053 usb compatible monolithic li-ion battery charger standalone charger with programmable timer, up to 1.25a charge current ltc4057 lithium-ion linear battery charger up to 800ma charge current, thermal regulation, thinsot package ltc4058 standalone 950ma lithium-ion charger in dfn c/10 charge termination, battery kelvin sensing, 7% charge accuracy ltc4059 900ma linear lithium-ion battery charger 2mm 2mm dfn package, thermal regulation, charge current monitor output ltc4061 standalone linear li-ion battery charger with thermistor input 4.2v, 0.35% float voltage, up to 1a charge current, 3mm 3mm dfn package ltc4063 li-ion charger with linear regulator up to 1a charge current, 100ma, 125mv ldo, 3mm 3mm dfn package ltc4088 high effciency battery charger/usb power manager maximizes available power from usb port, bat-track?, instant-on operation, 1.5a max charge current, 180m ideal diode with <50m option, 3.3v/25ma always-on ldo, 4mm 3mm dfn-14 package

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